Low voltage compensator for power supply in a complementary MOS transistor crystal oscillator circuit

ABSTRACT

A resistor is connected to the source of a C-MOS inverter included within a crystal oscillator circuit in order to reduce the power dissipation in the crystal oscillator circuit. A switching transistor responsive to the voltage reduction of a power supply source is connected to said resistor in a parallel fashion, thereby shunting the resistor when the power supply level is below a predetermined value.

BACKGROUND OF THE INVENTION

The present invention relates to a complementary MOS transistor crystaloscillator circuit and, more particularly, to a low voltage compensatorthe power supply in a complementary M0S transistor crystal oscillatorcircuit.

A C-MOS circuit is conventionally used in an electronic device whichrequires low power dissipation, especially, in an electronic wristwatchemploying a battery of low capacitance.

In an electronic timepiece, a C-MOS crystal oscillator circuit isusually employed, wherein a large part of power in the total powerdissipation is consumed, because the C-MOS crystal oscillator circuitoperates at very high frequencies in an electronic timepiece.Thereafter, it is required to reduce the power dissipation in the C-MOScrystal oscillator circuit in order to minimize the total powerdissipation in the electronic timepiece.

To this end, it has been proposed to connect a resistor to the source ofthe transistor included within a C-MOS inverter employed in the crystaloscillator circuit, thereby limiting the current flowing through theC-MOS inverter. However, a voltage V_(D) applied to the C-MOS inverteris unavoidably decreased by a voltage reduction V_(S) at the resistor.That is, V_(D) = V_(DD) - V_(S), when a power supply level is V_(DD) andthe V_(SS) is maintained at ground potential. Therefore, the permissiblelow voltage for the C-MOS inverter must be selected at a level lowerthan that of the crystal oscillator circuit by the voltage reductionV_(S) at the resistor connected to the source of the C-MOS inverter.This results in a requirement that the gain of the C-MOS inverter mustbe considerably high.

OBJECTS AND SUMMARY OF THE INVENTION

Accordingly, an object of the present invention is to provide acomplementary MOS transistor crystal oscillator circuit with low powercharacteristics.

Another object of the present invention is to provide a complementaryMOS transistor crystal oscillator circuit which can stably operatewithout regard to the variation of the power supply voltage.

Still another object of the present invention is to provide a lowvoltage compensator for the power supply in a complementary MOStransistor crystal oscillator circuit employed in an electronicwristwatch.

Other objects and further scope of applicability of the presentinvention will become apparent from the detailed description givenhereinafter. It should be understood, however, that the detaileddescription and specific examples, while indicating preferredembodiments of invention, are given by way of illustration only, sincevarious changes and modifications within the spirit and scope of theinvention will become apparent to those skilled in the art from thisdetailed description.

To achieve the above objects, pursuant to an embodiment of the presentinvention, a switching transistor responsive to the voltage reduction ofa power supply source is connected, in a parallel fashion, to a resistorconnected to the source of a transistor included within a C-MOS inverteremployed in a crystal oscillator circuit.

The switching transistor is maintained off when a power source voltageV_(DD) is above a predetermined value, thereby limiting the currentflowing through the C-MOS inverter with the use of the resistorconnected to the source of the transistor included within the C-MOSinverter. When a power source voltage v_(DD) is below the predeterminedvalue, the switching transistor is closed, thereby shunting the resistorconnected to the source of the transistor included within the C-MOSinverter. At this moment, the C-MOS inverter is connected directly toreceive the power source voltage V_(DD).

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will become more fully understood from thedetailed description given hereinbelow and the accompanying drawingswhich are given by way of illustration only, and thus are not limitativeof the present invention and wherein,

FIG. 1 is a circuit diagram of an embodiment of a complementary MOStransistor crystal oscillator circuit of the present invention; and

FIG. 2 is a circuit diagram of another embodiment of a complementary MOStransistor crystal oscillator circuit of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring now to FIG. 1, there is illustrated an embodiment of thepresent invention, a complementary MOS transistor crystal oscillatorcircuit of the present invention mainly comprising a crystal oscillationcircuit A and a switching circuit B.

The crystal oscillation circuit A comprises a C-MOS inverter 2, aresistor 1 connected to the source of the N-channel transistor includedwithin the C-MOS inverter 2, a quartz crystal vibrator 3 connectedbetween input and output terminals of the C-MOS inverter 2, a feedbackcircuit connected between the input and output terminals of the C-MOSinverter 2, said feedback circuit including a load capacitor 4 and aninput site capacitor 5, and a feedback resistor 6 connected, in aparallel fashion, to the feedback circuit for controlling the switchinglevel of the C-MOS inverter 2.

The switching circuit B comprises a switching transistor 7, acontrolling transistor 8, a pull up resistor 9, and resistors 10 and 11for determining the switching level. The switching transistor 7 isconnected to the crystal oscillation circuit A in parallel to the sourceresistor 1.

When the resistance values of the resistors 10 and 11 are selected at R₁and R₂, respectively, a gate level V_(G) of the controlling transistoris calculated as follows in the case where V_(SS) = 0V.

    v.sub.g = (r.sub.1 /r.sub.1 + r.sub.2) v.sub.dd

when the gate level V_(G) is above the threshold level of thecontrolling transistor 8, the controlling transistor 8 in ON and, hence,the switching transistor 7 is OFF because the gate level of thetransistor 7 is pulled down to 0V. Therefore, the current flowingthrough the crystal oscillation circuit A is limited by the sourceresistor 1.

When the gate level V_(G) of the controlling transistor 8 is below itsthreshold level due to the reduction of the power supply voltage V_(DD),the controlling transistor 8 is OFF and, hence, the gate level of theswitching transistor 7 is pulled up toward the power supply voltageV_(DD). This places the gate level of the switching transistor 7 aboveits threshold level and, therefore, the switching transistor 7 becomesON. At this moment, the power supply voltage V_(DD) is applied directlyto the C-MOS inverter 2, since the ON-resistance of the transistor 7 isconsiderably lower as compared with the resistance value of the sourceresistor 1.

It will be clear from the foregoing description that the crystaloscillation circuit A can operate well even when the power supplyvoltage V_(DD) is undesirably reduced. Moreover, the C-MOS inverter 2can be made of transistors of low gain.

In the foregoing embodiment, the resistor 10 is made of a variableresistor in order to facilitate the setting of the switching level.However, the resistors 10 and 11 can be made of fixed resistors. In thiscase the switching circuit B can be easily incorporated within an LSIcircuit.

FIG. 2 shows another embodiment of the present invention, whereinresistors are connected to the sources of the two transistors includedwithin the C-MOS inverter in order to stabilize the operation of theC-MOS inverter. Like elements corresponding to those of FIG. 1 areindicated by the like numerals.

The crystal oscillation circuit A comprises the C-MOS inverter 2, quartzcrystal vibrator 3, the feed back loop including the capacitors 4 and 5,and the feedback resistor 6. The crystal oscillation circuit A furthercomprises the resistor 1 connected to the source of the N-channeltransistor included within the C-MOS inverter 2, and another resistor 1'connected to the source of the P-channel transistor included within theC-MOS inverter 2. The resistors 1 and 1' function, in combination, tolimit the current flowing through the C-MOS inverter 2 and stabilize theoperation point of the C-MOS inverter 2.

The switching circuit B comprises the N-type switching transistor 7connected to the source of the N-channel transistor of the C-MOSinverter 2 in parallel to the source resistor 1, a P-type switchingtransistor 7' connected to the source of the P-channel transistor of theC-MOS inverter 2 in parallel to the source resistor 1', a controllingtransistor 8, another controlling transistor 8', a pull up resistor 9, apull down resistor 9', and resistors 10 and 11 for determining theswitching level.

When the power supply voltage V_(DD) is sufficiently high, the gatelevel of the controlling transistor 8 is above its threshold level and,hence, the transistor 8 is ON. The gate levels of the transistors 7 and8' are pulled toward the V_(SS) and, therefore, the transistor 7 is OFFand the transistor 8' is ON. The gate level of the transistor 7' ispulled toward the power supply voltage V_(DD) and, hence, the transistor7' is OFF. The source resistors 1 and 1' are inserted in the circuit,since the transistors 7 and 7' are OFF, thereby limiting the currentflowing through the C-MOS inverter 2.

Conversely, when the gate level of the controlling transistor 8 is belowits threshold level due to the reduction of the power supply voltageV_(DD), the controlling transistor 8 is OFF and, hence, the gate levelsof the transistors 7 and 8' are pulled toward the power supply voltageV_(DD). Therefore, the switching transistor 7 is ON, and the controllingtransistor 8' is OFF. The gate level of the switching transistor 7' ispulled toward V_(SS) because the controlling transistor 8' is OFF and,therefore, the switching transistor 7' becomes ON. Under theseconditions, the source resistors 1 and 1' are shunted, whereby the powersupply voltage V_(DD) is applied directly to the C-MOS inverter 2.

In still another form, the switching levels of the controllingtransistors 8 and 8' can be selected at different values, therebycontrolling the resistance value connected to the C-MOS inverter 2 attwo different values.

The abovementioned crystal oscillator circuit of the present inventionis effectively applied to an electronic apparatus of which the powersupply voltage is unavoidably variable over a considerably large range,such as in an electronic wristwatch having an LED display or anillumination lamp for a liquid crystal display.

The invention being thus described, it will be obvious that the same maybe varied in many ways. Such variations are not to be regarded as adeparture from the spirit and scope of the invention, and all suchmodifications are intended to be included within the scope of thefollowing claims.

What is claimed is:
 1. In a complementary MOS transistor crystaloscillator circuit including two power supply terminals, a C-MOSinverter connected across said two power supply terminals, a quartzcrystal vibrator connected between an input terminal and an outputterminal of said C-MOS inverter, and a source resistor connected betweenthe source of one transistor of the C-MOS inverter and one of said twopower supply terminals, the improvement comprising:switching meansconnected in parallel with the source resistor for shunting said sourceresistor when said switching means is closed; and control means forclosing the switching means when the power supply voltage is below apredetermined value.
 2. The crystal oscillator circuit of claim 1,wherein the source resistor is connected between the source of anN-channel transistor of the C-MOS inverter and a grounded power supplyterminal, and the switching means is an N-type transistor.
 3. In acomplementary MOS transistor crystal oscillator circuit including twopower supply terminals, a C-MOS inverter connected across said two powersupply terminals, a quartz crystal vibrator connected between an inputterminal and an output terminal of said C-MOS inverter, a first sourceresistor having one end connected to the source of the N-channeltransistor of the C-MOS inverter and the other end connected to one ofsaid power supply terminals, and a second source resistor having one endconnected to the source of the P-channel transistor of the C-MOSinverter and the other end connected to the other power supply terminal,the improvement comprising:a first switching means connected in parallelwith said first source resistor for shunting said first source resistorwhen said switching means is closed; a second switching means connectedin parallel with said second source resistor for shunting said secondsource resistor when said second switching means is closed; and controlmeans for closing said first and second switching means when the powersupply voltage is below a predetermined value.
 4. The crystal oscillatorcircuit of claim 3, wherein the first switching means is an N-typetransistor, and the second switching means is a P-type transistor.